? semiconductor components industries, llc, 2002 june, 2002 rev. 3 1 publication order number: mc74vhct74a/d mc74vhct74a dual d-type flip-flop with set and reset the mc74vhct74a is an advanced high speed cmos dtype flipflop fabricated with silicon gate cmos technology. it achieves high speed operation similar to equivalent bipolar schottky ttl while maintaining cmos low power dissipation. the signal level applied to the d input is transferred to q output during the positive going transition of the clock pulse. reset (rd ) and set (sd ) are independent of the clock (cp) and are accomplished by setting the appropriate input low. the internal circuit is composed of three stages, including a buffer output which provides high noise immunity and stable output. the inputs tolerate voltages up to 7 v, allowing the interface of 5 v systems to 3 v systems. the vhct inputs are compatible with ttl levels. this device can be used as a level converter for interfacing 3.3 v to 5.0 v, because it has full 5 v cmos level output swings. the vhct74a input structures provide protection when voltages between 0 v and 5.5 v are applied, regardless of the supply voltage. the output structures also provide protection when v cc = 0 v. these input and output structures help prevent device destruction caused by supply voltage input/output voltage mismatch, battery backup, hot insertion, etc. ? high speed: f max = 60 mhz (typ) at v cc = 5 v ? low power dissipation: i cc = 2 a (max) at t a = 25 c ? power down protection provided on inputs ? balanced propagation delays ? designed for 4.5 v to 5.5 v operating range ? low noise: v olp = 0.8 v (max) ? pin and function compatible with other standard logic families ? latchup performance exceeds 300 ma ? esd performance: hbm > 2000 v; machine model > 200 v ? chip complexity: 128 fets or 32 equivalent gates http://onsemi.com device package shipping ordering information mc74vhctxxad soic 55 rail mc74vhctxxadt tssop 96 rail d suffix 14lead soic package case 751a dt suffix 14lead tssop package case 948g m suffix 14lead soic eiaj package case 965 figure 1. pin assignment sd1 cp1 d1 rd1 11 12 13 14 8 9 10 5 4 3 2 1 7 6 sd2 cp2 d2 rd2 v cc q2 q2 gnd q1 q1
mc74vhct74a http://onsemi.com 2 figure 2. logic diagram rd1 d1 cp1 sd1 rd2 d2 cp2 sd2 1 2 3 4 13 12 11 10 5 6 9 8 q1 q1 q2 q2 function table inputs outputs sd rd cp d q q lh xx hl hl xx lh l l x x h* h* hh h hl hh l lh h h l x no change h h h x no change h h x no change *both outputs will remain high as long as set and reset are low, but the output states are unpredictable if set and reset go high simultaneously.
mc74vhct74a http://onsemi.com 3 ??????????????????????? ??????????????????????? maximum ratings* ???? ???? symbol ?????????????? ?????????????? parameter ????? ????? value ??? ??? unit ???? ???? v cc ?????????????? ?????????????? dc supply voltage ????? ????? 0.5 to + 7.0 ??? ??? v ???? ???? v in ?????????????? ?????????????? dc input voltage ????? ????? 0.5 to + 7.0 ??? ??? v ???? ? ?? ? ???? v out ?????????????? ? ???????????? ? ?????????????? dc output voltage v cc = 0 high or low state ????? ? ??? ? ????? 0.5 to + 7.0 0.5 to v cc + 0.5 ??? ? ? ? ??? v ???? ???? i ik ?????????????? ?????????????? input diode current ????? ????? 20 ??? ??? ma ???? ???? i ok ?????????????? ?????????????? output diode current (v out < gnd; v out > v cc ) ????? ????? 20 ??? ??? ma ???? ???? i out ?????????????? ?????????????? dc output current, per pin ????? ????? 25 ??? ??? ma ???? ???? i cc ?????????????? ?????????????? dc supply current, v cc and gnd pins ????? ????? 50 ??? ??? ma ???? ???? p d ?????????????? ?????????????? power dissipation in still air, soic packages2 tssop package2 ????? ????? 500 450 ??? ??? mw ???? ???? t stg ?????????????? ?????????????? storage temperature ????? ????? 65 to + 150 ??? ??? c * absolute maximum continuous ratings are those values beyond which damage to the device may occur. exposure to these conditions or conditions beyond those indicated may adversely affect device reliability. functional operation under absolutemaximumrated conditions is not implied. 2derating soic packages: 7 mw/ c from 65 to 125 c tssop package: 6.1 mw/ c from 65 to 125 c recommended operating conditions ???? ???? symbol ????????????????????????? ????????????????????????? parameter ??? ??? min ??? ??? max ?? ?? unit ???? ???? v cc ????????????????????????? ????????????????????????? dc supply voltage ??? ??? 4.5 ??? ??? 5.5 ?? ?? v ???? ???? v in ????????????????????????? ????????????????????????? dc input voltage ??? ??? 0 ??? ??? 5.5 ?? ?? v ???? ???? v out ????????????????????????? ????????????????????????? dc output voltage v cc = 0 high or low state ??? ??? 0 0 ??? ??? 5.5 v cc ?? ?? v ???? ???? t a ????????????????????????? ????????????????????????? operating temperature ??? ??? 40 ??? ??? + 85 ?? ?? c ???? ???? t r , t f ????????????????????????? ????????????????????????? input rise and fall time v cc =5.0 v 0.5 v ??? ??? 0 ??? ??? 20 ?? ?? ns/v ????????????????????????????????? ????????????????????????????????? dc electrical characteristics ???? ???? ?????????? ?????????? ??????? ??????? ???? ???? v cc ?????? ?????? t a = 25 c ?????? ?????? t a = 40 to 85 c ?? ?? ???? ???? symbol ?????????? ?????????? parameter ??????? ??????? test conditions ???? ???? v cc v ??? ??? min ?? ?? typ ??? ??? max ???? ???? min ??? ??? max ?? ?? unit ???? ???? v ih ?????????? ?????????? minimum highlevel input voltage ??????? ??????? ???? ???? 4.5 to 5.5 ??? ??? 2.0 ?? ?? ??? ??? ???? ???? 2.0 ??? ??? ?? ?? v ???? ???? v il ?????????? ?????????? maximum lowlevel input voltage ??????? ??????? ???? ???? 4.5 to 5.5 ??? ??? ?? ?? ??? ??? 0.8 ???? ???? ??? ??? 0.8 ?? ?? v ???? ???? v oh ?????????? ?????????? minimum highlevel output voltage v v v ??????? ??????? i oh = 50 a ???? ???? 4.5 ??? ??? 4.4 ?? ?? 4.5 ??? ??? ???? ???? 4.4 ??? ??? ?? ?? v ???? ???? ?????????? ?????????? v in = v ih or v il ??????? ??????? i oh = 8 ma ???? ???? 4.5 ??? ??? 3.94 ?? ?? ??? ??? ???? ???? 3.80 ??? ??? ?? ?? ???? ???? v ol ?????????? ?????????? maximum lowlevel output voltage v v v ??????? ??????? i ol = 50 a ???? ???? 4.5 ??? ??? ?? ?? 0.0 ??? ??? 0.1 ???? ???? ??? ??? 0.1 ?? ?? v ???? ???? ?????????? ?????????? v in = v ih or v il ??????? ??????? i ol = 8 ma ???? ???? 4.5 ??? ??? ?? ?? ??? ??? 0.36 ???? ???? ??? ??? 0.44 ?? ?? ???? ???? i in ?????????? ?????????? maximum input leakage current ??????? ??????? v in = 5.5 v or gnd ???? ???? 0 to 5.5 ??? ??? ?? ?? ??? ??? 0.1 ???? ???? ??? ??? 1.0 ?? ?? a ???? ???? i cc ?????????? ?????????? maximum quiescent supply current ??????? ??????? v in = v cc or gnd ???? ???? 5.5 ??? ??? ?? ?? ??? ??? 2.0 ???? ???? ??? ??? 20.0 ?? ?? a ???? ? ?? ? ???? i cct ?????????? ? ???????? ? ?????????? quiescent supply current ??????? ? ????? ? ??????? per input: v in = 3.4 v other input: v cc or gnd ???? ? ?? ? ???? 5.5 ??? ? ? ? ??? ?? ?? ?? ??? ? ? ? ??? 1.35 ???? ? ?? ? ???? ??? ? ? ? ??? 1.50 ?? ?? ?? ma ???? ???? i opd ?????????? ?????????? output leakage current ??????? ??????? v out = 5.5 v ???? ???? 0 ??? ??? ?? ?? ??? ??? 0.5 ???? ???? ??? ??? 5.0 ?? ?? a this device contains protection circuitry to guard against damage due to high static voltages or electric fields. however, precautions must be taken to avoid applications of any voltage higher than maximum rated voltages to this highimpedance cir- cuit. for proper operation, v in and v out should be constrained to the range gnd (v in or v out ) v cc . unused inputs must always be tied to an appropriate logic voltage level (e.g., either gnd or v cc ). unused outputs must be left open.
mc74vhct74a http://onsemi.com 4 ????????????????????????????????? ????????????????????????????????? ac electrical characteristics (input t r = t f = 3.0ns) ???? ???? ????????? ????????? ???????? ???????? ????????? ????????? t a = 25 c ?????? ?????? t a = 40 to 85 c ?? ?? ???? ???? symbol ????????? ????????? parameter ???????? ???????? test conditions ???? ???? min ??? ??? typ ???? ???? max ??? ??? min ???? ???? max ?? ?? unit ???? ? ?? ? ???? t plh , t phl ????????? ? ??????? ? ????????? maximum propagation delay, cp to q or q ???????? ? ?????? ? ???????? v cc = 5.0 0.5v c l = 15 pf c l = 50 pf ???? ? ?? ? ???? ??? ? ? ? ??? 5.8 6.3 ???? ? ?? ? ???? 7.8 8.8 ??? ? ? ? ??? 1.0 1.0 ???? ? ?? ? ???? 9.0 10.0 ?? ?? ?? ns ???? ???? t plh , t phl ????????? ????????? maximum propagation delay, sd or rd to q or q ???????? ???????? v cc = 5.0 0.5v c l = 15 pf c l = 50 pf ???? ???? ??? ??? 7.6 8.1 ???? ???? 10.4 11.4 ??? ??? 1.0 1.0 ???? ???? 12.0 13.0 ?? ?? ns ???? ? ?? ? ???? f max ????????? ? ??????? ? ????????? maximum clock frequency (50% duty cycle) ???????? ? ?????? ? ???????? v cc = 5.0 0.5v c l = 15 pf c l = 50 pf ???? ? ?? ? ???? 100 80 ??? ? ? ? ??? 160 140 ???? ? ?? ? ???? ??? ? ? ? ??? 80 65 ???? ? ?? ? ???? ?? ?? ?? mhz ???? ???? c in ????????? ????????? maximum input capacitance ???????? ???????? ???? ???? ??? ??? 4 ???? ???? 10 ??? ??? ???? ???? 10 ?? ?? pf typical @ 25 c, v cc = 5.0 v c pd power dissipation capacitance (note 1.) 24 pf 1. c pd is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption with out load. average operating current can be obtained by the equation: i cc(opr ) = c pd v cc f in + i cc /2 (per flipflop). c pd is used to determine the noload dynamic power consumption; p d = c pd v cc 2 f in + i cc v cc . timing requirements (input t r = t f = 3.0 ns) ???? ???? ???????????????? ???????????????? ???? ???? v cc ??????????? ??????????? guaranteed limit ?? ?? ???? ???? symbol ???????????????? ???????????????? parameter ???? ???? v cc v ????? ????? t a = 25 c ??????? ??????? t a = 40 to 85 c ?? ?? unit ???? ???? t w ???????????????? ???????????????? minimum pulse width, cp ???? ???? 5.0 0.5 ????? ????? 5.0 ??????? ??????? 5.0 ?? ?? ns ???? ???? t w ???????????????? ???????????????? minimum pulse width, rd or sd ???? ???? 5.0 0.5 ????? ????? 5.0 ??????? ??????? 5.0 ?? ?? ns ???? t su ???????????????? minimum setup time, d to cp ???? 5.0 0.5 ????? 5.0 ??????? 5.0 ?? ns ???? ???? t h ???????????????? ???????????????? minimum hold time, d to cp ???? ???? 5.0 0.5 ????? ????? 0.0 ??????? ??????? 0.0 ?? ?? ns ???? ???? t rec ???????????????? ???????????????? minimum recovery time, sd or rd to cp ???? ???? 5.0 0.5 ????? ????? 3.5 ??????? ??????? 3.5 ?? ?? ns
mc74vhct74a http://onsemi.com 5 figure 3. switching waveform figure 4. switching waveform 1.5 v 1.5v v cc 1.5v v cc 1.5v 3 v 3 v gnd gnd sd or rd q or q q or q cp t plh t phl 1.5 v d cp 3 v 3 v gnd figure 5. switching waveform valid gnd t su t h t rec t w *includes all probe and jig capacitance c l * test point device under test output figure 6. switching waveform 1/f max cp q or q 3v gnd 1.5 v 1.5 v t plh t phl t w 1.5 v figure 7. input equivalent circuit input v oh v ol 3v gnd
mc74vhct74a http://onsemi.com 6 outline dimensions case 751a03 issue f soic14 notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: millimeter. 3. dimensions a and b do not include mold protrusion. 4. maximum mold protrusion 0.15 (0.006) per side. 5. dimension d does not include dambar protrusion. allowable dambar protrusion shall be 0.127 (0.005) total in excess of the d dimension at maximum material condition. a b g p 7 pl 14 8 7 1 m 0.25 (0.010) b m s b m 0.25 (0.010) a s t t f r x 45 seating plane d 14 pl k c j m dim min max min max inches millimeters a 8.55 8.75 0.337 0.344 b 3.80 4.00 0.150 0.157 c 1.35 1.75 0.054 0.068 d 0.35 0.49 0.014 0.019 f 0.40 1.25 0.016 0.049 g 1.27 bsc 0.050 bsc j 0.19 0.25 0.008 0.009 k 0.10 0.25 0.004 0.009 m 0 7 0 7 p 5.80 6.20 0.228 0.244 r 0.25 0.50 0.010 0.019 d suffix
mc74vhct74a http://onsemi.com 7 outline dimensions case 948g01 issue o tssop dim min max min max inches millimeters a 4.90 5.10 0.193 0.200 b 4.30 4.50 0.169 0.177 c --- 1.20 --- 0.047 d 0.05 0.15 0.002 0.006 f 0.50 0.75 0.020 0.030 g 0.65 bsc 0.026 bsc h 0.50 0.60 0.020 0.024 j 0.09 0.20 0.004 0.008 j1 0.09 0.16 0.004 0.006 k 0.19 0.30 0.007 0.012 k1 0.19 0.25 0.007 0.010 l 6.40 bsc 0.252 bsc m 0 8 0 8 notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: millimeter. 3. dimension a does not include mold flash, protrusions or gate burrs. mold flash or gate burrs shall not exceed 0.15 (0.006) per side. 4. dimension b does not include interlead flash or protrusion. interlead flash or protrusion shall not exceed 0.25 (0.010) per side. 5. dimension k does not include dambar protrusion. allowable dambar protrusion shall be 0.08 (0.003) total in excess of the k dimension at maximum material condition. 6. terminal numbers are shown for reference only. 7. dimension a and b are to be determined at datum plane -w-. s u 0.15 (0.006) t 2x l/2 s u m 0.10 (0.004) v s t l u seating plane 0.10 (0.004) t ??? ??? ??? section nn detail e j j1 k k1 detail e f m w 0.25 (0.010) 8 14 7 1 pin 1 ident. h g a d c b s u 0.15 (0.006) t v 14x ref k n n dt suffix
mc74vhct74a http://onsemi.com 8 outline dimensions case 96501 issue o so14 h e a 1 dim min max min max inches --- 2.05 --- 0.081 millimeters 0.05 0.20 0.002 0.008 0.35 0.50 0.014 0.020 0.18 0.27 0.007 0.011 9.90 10.50 0.390 0.413 5.10 5.45 0.201 0.215 1.27 bsc 0.050 bsc 7.40 8.20 0.291 0.323 0.50 0.85 0.020 0.033 1.10 1.50 0.043 0.059 0 0.70 0.90 0.028 0.035 --- 1.42 --- 0.056 a 1 h e q 1 l e 10 0 10 l e q 1 notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: millimeter. 3. dimensions d and e do not include mold flash or protrusions and are measured at the parting line. mold flash or protrusions shall not exceed 0.15 (0.006) per side. 4. terminal numbers are shown for reference only. 5. the lead width dimension (b) does not include dambar protrusion. allowable dambar protrusion shall be 0.08 (0.003) total in excess of the lead width dimension at maximum material condition. dambar cannot be located on the lower radius or the foot. minimum space between protrusions and adjacent lead to be 0.46 ( 0.018). 0.13 (0.005) m 0.10 (0.004) d z e 1 14 8 7 e a b view p c l detail p m a b c d e e 0.50 m z m suffix on semiconductor and are registered trademarks of semiconductor components industries, llc (scillc). scillc reserves the right to mak e changes without further notice to any products herein. scillc makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does scillc assume any liability arising out of the application or use of any product or circuit, and s pecifically disclaims any and all liability, including without limitation special, consequential or incidental damages. atypicalo parameters which may be provided in scillc data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. all operating parameters, including atypicalso must be validated for each customer application by customer's technical experts. scillc does not convey any license under its patent rights nor the rights of others. scillc products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body , or other applications intended to support or sustain life, or for any other application in which the failure of the scillc product could create a sit uation where personal injury or death may occur. should buyer purchase or use scillc products for any such unintended or unauthorized application, buyer shall indem nify and hold scillc and its of ficers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and re asonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized u se, even if such claim alleges that scillc was negligent regarding the design or manufacture of the part. scillc is an equal opportunity/affirmative action employ er. publication ordering information japan : on semiconductor, japan customer focus center 4321 nishigotanda, shinagawaku, tokyo, japan 1410031 phone : 81357402700 email : r14525@onsemi.com on semiconductor website : http://onsemi.com for additional information, please contact your local sales representative. mc74vhct74a/d literature fulfillment : literature distribution center for on semiconductor p.o. box 5163, denver, colorado 80217 usa phone : 3036752175 or 8003443860 toll free usa/canada fax : 3036752176 or 8003443867 toll free usa/canada email : onlit@hibbertco.com n. american technical support : 8002829855 toll free usa/canada
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